The field of electronic design automation (EDA) involves using computers and software in the design of electronic systems, such as integrated circuits, printed circuit boards, and field-programmable gate arrays (FPGAs), for example. A hardware description language (HDL) may be used in an EDA process to define the specific implementational details of an electronic circuit layout, which may include digital logic gates, for example. Logic synthesis is a process whereby a set of design parameters and instructions are translated into an actual design implementation of a physical circuit. Register-transfer level (RTL) design may be used in HDL to assemble a high-level representation of a circuit design, which may be translated into an actual physical circuit implementation. Various software tools may be used for analysis and synthesis in EDA. For example, the Vivado® Design Suite is a software suite produced by Xilinx, Inc. (headquartered in San Jose, Calif.) for the synthesis and analysis of HDL designs.
Semiconductor intellectual property cores (“IP cores” or “IP blocks”) are reusable units of logic, cell, or integrated circuit layout design that can be used as building blocks within application-specific integrated circuit (ASIC) designs or field-programmable gate array (FPGA) logic designs. “Soft” IP cores may be typically offered as synthesizable RTL, where synthesizable cores may be delivered in a hardware description language such as Verilog or VHDL. “Hard” IP cores are defined as IP cores that cannot be modified and are thus “hard.”